BOOK

VHDL Niyoru FPGA Sekkei & Debug

Matsumura Ken / Kyocho Sakamaki Kei Toshimi / Kyocho

2500yen
(2750yen Tax incl. in Japan)
Points You Earn 1% (25p)
Release Date March 26, 2012
Availability Sold Out
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Product Details

Catalog No.NEOBK-1219203
JAN/ISBN 9784274503856
Product Type BOOK
Pages 158

Books are basically written in Japanese except for bilingual books or ones indicated as not written only in Japanese.

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Translate Description

*As it is a machine translation, the result may not provide an accurate description. Please use it only as a reference. *Not available within the China mainland region.

Description in Japanese

VHDLによるFPGA設計&デバッグ / 松村謙/共著 坂巻佳壽美/共著

VHDLによる回路設計の基本的な説明からテストのための記述に仕方に至るまでの、一連の工程を紹介する。

Related Offer & Feature

    Tracklisting

    1
    1 なぜ今、HDLによるFPGA設計なのか?(電子回路設計のパラダイムシフト
    2
    HDLの種類と標準化の動向 ほか)
    3
    2 VHDLによる回路記述(VHDL記述の基礎
    4
    テストベンチの書き方 ほか)
    5
    3 より効率的なデバッグ(assert文によるエラー判定
    6
    generic文によるパラメータ渡し ほか)
    7
    4 大規模回路の設計とデバッグへの対応(TPUについて
    8
    階層化設計 ほか)

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